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HA16141P/FP, HA16142P/FP
PFC and PWM Controller
REJ03F0145-0500 (Previous: ADE-204-036D) Rev.5.00 Jun 15, 2005
Description
The HA16141P/FP and the HA16142P/FP are power supply controller ICs combining an AC-DC converter switching controllers for power factor correction and off-line power supply switching controllers. PFC (Power factor correction) section employs average current mode PWM and off-line power supply control section employs peak current mode PWM. The HA16142P/FP is the change version of HA16141P/FP's PWM maximum on duty cycle. The PFC operation can be turned on and off by external control signal. Use of this on/off function makes it possible to disable PFC operation at a low line voltage, or to perform remote control operation from the transformer secondary side. The PFC power supply boosted output voltage is not only fed to an error amplifier input signal but also fed to as the boost voltage monitor circuit. PG signal is put out if the boost voltage is out-of-spec. The PWM controller, which begins operation at the same time as release of the IC's UVLO (under-voltage lockout) is suitable for auxiliary power supply use in a multi-output power supply system.
Features
* Synchronized PFC and PWM timing * Self oscillation with fixed frequency PFC : 100 kHz (15 %) PWM : 200 kHz (15 %) * PFC function on/off control * PFC boosted output voltage monitor * High-output current gate drivers PFC driver peak current : 1.5 A typ. PWM driver peak current : 1.0 A typ. * PWM maximum on duty cycle 72% min (HA16141P/FP) 49.5% max (HA16142P/FP)
Rev.5.00 Jun 15, 2005 page 1 of 17
HA16141P/FP, HA16142P/FP
Pin Arrangement
GND PWM-OUT PFC-OUT VCC VREF PG CAO PFC-CS 1 2 3 4 5 6 7 8 (Top view) 16 15 14 13 12 11 10 9 PWM-CS PWM-EO O.C PFC-EO TIM PFC-FB IAC PFC-ON
Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol GND PWM-OUT PFC-OUT VCC VREF PG CAO PFC-CS PFC-ON IAC PFC-FB TIM PFC-EO O.C PWM-EO PWM-CS Function Ground Power MOS FET driver output (PWM control) Power MOS FET driver output (PFC control) Supply voltage Reference voltage Power Good signal output (open-drain output) Average current control error amp. output PFC control current sense signal input PFC function on/off signal input Multiplier reference current input PFC control error amp. input Overcurrent timer time setting PFC control error amp. output Overcurrent detector signal input PWM control error amp. output (photocoupler input also possible) (HA16141 only) PWM control feedback voltage signal input (HA16142 only) PWM control current sense signal input
Rev.5.00 Jun 15, 2005 page 2 of 17
HA16141P/FP, HA16142P/FP
Block Diagram
PFC-EO 13 IAC 10 PFC-CS 8 CAO 7 VCC 4 UVLO 2.7k 2.5V Multiplier -0.5V PFC-CLIMIT PFC Control PFC-CAMP Gain Selector PFC-ON 9 PFC/PWM Supervisor VCC VCC HA16141 only 5R 100kHz 1 GND Oscillator 200kHz PWM-VAMP 2.5V PWM Control 1.0A 2 PWM-OUT VREF 1.5A 3 PFC-OUT 5 VREF
PFC-VAMP PFC-FB 11
RES LATCH
O.C 14
Over Current Det.
Integrator
R
16 PWM-CS 12 TIM 6 PG 15 PWM-EO
Rev.5.00 Jun 15, 2005 page 3 of 17
HA16141P/FP, HA16142P/FP
System Diagram
Rec+ 1.8m Q1 + 470 (600V) 570k (1/2W) + 4.7 From Q2 drain B+ T1 To PFC-FB 710k VRB 4.7k GND B+ OUT (385V dc)
Rec-
From PFC-OUT
VCC
Oscillator 200kHz 5s VREF 500ns 820k 10s 0.65V 3.4V 100kHz 1s (HA16141) 2.3s (HA16142) PWM-RES PFC-DT RAMP UVL CT 22.2V H L UVLO 5V VREF Generator 0.1 VREF H GOOD L VREF GOOD 5V Internal Bias
VREF
36k 3.3n 220p
CAO
IMO = K {IAC x (VEO - 1V)}
IAC
IAC VEO K
910k
IMO 2.7k
- +
VREF
- +
-0.5V 55k
R Q S R Gate Driver 1.5A(PEAK)
PFC -OUT
To Q1 gate
100 0.1 (5W)
PFC -CS
10n
PFC-CAMP
+ -
PFC-CLIMIT
Q S
To T1 Gate Driver 1A(PEAK)
K = 0.25 750k
PWM -OUT
1 (1W)
PFC -EO
47n
K = 0.05
PWM-RES
R Q S
PFC-VAMP
2.5V
4.7n
PFC -FB
From VRB(B+monitor)
+ -
- + Gain Selector Supervisor
3.83V 3.63V
VCC
5RB
PWM-VAMP
RB
HA16141 only
- +
2.5V
PWM -EO
51k 0.47 1n
2R +B HIGH
x1
720k
+ -
2.75V 2.60V
- +
R
External parts of PWM-EO pin are applies to HA16141 only.
- +
2.2 33k 51k 0.1
+B LOW
Over Current Detector + -
1V
PWM -CS
0.1
PFC -ON
O.C + -
0.3V 0.1 (1W) Current Monitor
- +
1.5V 1.2V
2.34V 1.70V PFC-OFF
Latch Block
PWM-OFF LOGIC S Q R LOGIC 3V 26.2
VREF GOOD VREF 5.1k Enable to secondary
+ - - +
5V 4V VCC 7.1V 38.2
TIM Integrator
5.2 1n
PG
R Q S
+ -
2.5V
Circuit Ground Level
GND
Unit R: C: F
Note: The constants for the external components are for reference. Please confirm the operation when designing the system.
Rev.5.00 Jun 15, 2005 page 4 of 17
HA16141P/FP, HA16142P/FP
Absolute Maximum Ratings
(Ta = 25C)
Item Supply voltage Peak PFC-OUT current Peak PWM-OUT current DC PFC-OUT current DC PWM-OUT current Terminal voltage CAO voltage PFC-EO voltage PWM-EO voltage PFC-ON voltage IAC voltage IAC current PFC-CS voltage TIM voltage VREF current PG voltage PG current Power dissipation Operating temperature Storage temperature Junction temperature Notes: 1. 2. 3. 4. 5. 6. Symbol VCC Ipk-pfc Ipk-pwm Idc-pfc Idc-pwm Vi-group1 Vi-group2 Vcao Vpfc-eo Vpwm-eo Vpfc-on Vi-ac Ii-ac Vi-cs Vi-tim Io-ref Vo-pg Io-pg PT Topr Tstg Tj Rating 20 1.5 1.0 0.15 0.10 -0.3 to VCC -0.3 to Vref -0.3 to Veoh-ca -0.3 to Veoh-pfc -0.3 to Veoh-pwm -0.3 to +7 -0.3 to +5 0.8 -1.5 to +0.3 -0.3 to +6 -20 -0.3 to +7 15 1 -40 to +105 -55 to +150 150 Unit V A A A A V V V V V V V mA V V mA V mA W C C C 6 4 5 3 3 Note
Rated voltages are with reference to the GND pin. For rated currents, inflow to the IC is indicated by (+), and outflow by (-). Shows the transient current when driving a capacitive load. Group1 is the rated voltage for the following pins: PFC-OUT, PWM-OUT Group2 is the rated voltage for the following pins: VREF, PFC-FB, PWM-CS This is the value when the ambient temperature (Ta) is 25C or below. If Ta exceeds 25C, the graph below applies. For the SOP package, this value is based on actual measurements on a 10% wiring density glass epoxy circuit board (40 mm x 40 mm x 1.6 mm).
Maximum power dissipation PT (W)
25C 1
105C
0.5
-8mW/C
0
-40
0
50 100 Ambient temperature Ta (C)
150
Rev.5.00 Jun 15, 2005 page 5 of 17
HA16141P/FP, HA16142P/FP
Electrical Characteristics
(Ta = 25C, VCC = 14 V)
Supply Item Start threshold Shutdown threshold UVLO hysteresis Start-up current Is temperature stability Operating current Latch current Shunt zener voltage Vz temperature stability PFC-OUT Minimum duty cycle Maximum duty cycle Rise time Fall time Peak current Low voltage Symbol VH VL dVUVL IS dIS/dTa ICC ILATCH VZ dVZ/dTa Dmin-pfc Dmax-pfc tr-pfc tf-pfc Ipk-pfc Vol1-pfc Vol2-pfc Vol3-pfc High voltage PWM-OUT Minimum duty cycle Maximum duty cycle Voh1-pfc Voh2-pfc Dmin-pwm Dmax-pwm Min 12.2 9.4 2.6 150 - 4 230 21.2 - - 90 - - - - - - 13.5 12.6 - 72 42.5 Rise time Fall time Peak current Low voltage tr-pwm tf-pwm Ipk-pwm Vol1-pwm Vol2-pwm Vol3-pwm Voh1-pwm Voh2-pwm Vref Vref-line Vref-load dVref - - - - - - 13.5 12.0 4.9 - - - Typ 13.0 10.0 3.0 200 -0.3 7 310 22.2 +4 - 95 30 30 1.5 0.05 0.35 0.03 13.9 13.3 - 80 46 30 30 1.0 0.05 0.5 0.03 13.9 13.0 5.0 5 5 80 Max 13.8 10.6 3.4 300 - 9 375 23.2 - 0 98 100 100 - 0.2 1.4 0.7 - - 0 88 49.5 100 100 - 0.2 2.0 0.7 - - 5.1 20 20 - Unit V V V A %/C mA A V mV/C % % ns ns A V V V V V % % % ns ns A V V V V V V mV mV ppm/C VCC = 12V 1 * IAC = 100A, CL = 0F VCC = 9V ICC = 14mA 1 ICC = 14mA * CAO = 3.6V CAO = 0V CL = 1000p CL = 1000p CL = 0.01F * Iout = 20mA
1
Test Conditions
Iout = 200mA Iout = 10mA, VCC = 5V Iout = -20mA Iout = -200mA PWM-EO = 1.3V PWM-CS = 0V PWM-EO = 5V 2 PWM-CS = 0V * PWM-EO = 5V 3 PWM-CS = 0V * CL = 1000p CL = 1000p 1 CL = 0.01F * Iout = 20mA Iout = 200mA Iout = 10mA, VCC = 5V Iout = -20mA Iout = -200mA Isource = 1mA Isource = 1mA VCC = 12V to 18V Isource = 1mA to 20mA Ta = -40 to 105C *
1
High voltage VREF Output voltage Line regulation Load regulation Temperature stability Notes: 1. Design spec. 2. Apply to HA16141. 3. Apply to HA16142.
Rev.5.00 Jun 15, 2005 page 6 of 17
HA16141P/FP, HA16142P/FP
Electrical Characteristics (cont.)
(Ta = 25C, VCC = 14 V)
Oscillator Item Initial accuracy fpwm temperature stability fpwm voltage stability Ramp peak voltage PFC-ON Ramp valley volatge PFC on voltage PFC off voltage PFC on-off hysteresis Supervisor/ PG Input current PFC GOOD threshold voltage PFC FAIL threshold voltage +B High PFC inhibit voltage +B High PFC restart voltage PG leak current PG shunt current Delay to PG O.C (Over Current Detector) Integrator O.C threshold voltage PWM-CS threshold voltage O.C input current Sink current Source current O.C trigger Source Current PWM-CS trigger Integrated time O.C trigger Integrated Time PWM-CS trigger Symbol fpwm fpfc dfpwm/dTa fpwm(line) Vramp-H Vramp-L Von-pfc Voff-pfc dVon-off Ipfc-on Vb-good Vb-fail Vb-h Vb-res Ioff-pg Ion-pg tg-pg VOC VCS IOC Isnk-tim Isrc-tim1 Isrc-tim2 t-tim1 Min 170 85 - -1.5 - - 1.3 1.0 0.15 - 2.29 1.66 2.69 2.54 - 5 - 0.27 0.9 - 3.9 -16 -25 88 Typ 200 100 0.1 +0.5 3.4 0.65 1.5 1.2 0.30 0.1 2.34 1.70 2.75 2.60 0.001 15 0.2 0.30 1.0 -0.1 5.2 -21 -33 110 Max 230 115 - +1.5 3.6 - 1.7 1.4 0.45 1.0 2.39 1.74 2.81 2.66 1.0 - 1 0.33 1.1 -1.0 6.5 -26 -41 132 Unit kHz kHz %/C % V V V V V A V V V V A mA s V V A A A A s O.C = 0V TIM = 2V TIM = 2V, O.C = 0.5V *
1
Test Conditions Measured pin: PWM-OUT Measured pin: PFC-OUT 1 Ta = -40 to 105C * VCC = 12V to 18V *
1
PFC-ON = 2V Input pin: PFC-FB Input pin: PFC-FB Input pin: PFC-FB Input pin: PFC-FB PG = 5V PG = 3V * Step signal (5 to 0V) to PFC-ON
2
TIM = 2V, PWM-CS = 2V 1 * Step signal (0 to O.C, Ctim = Measured pin: PG Step signal (0 to PWM-CS, Ctim = Measured pin: PG 1V) to 1000p, 2V) to 1000p,
t-tim2
53
67
81
s
Notes: 1. Design spec. 2. Maximum rating of PG current is 15 mA. Use series resistor to limit PG current lower than 15 mA.
Rev.5.00 Jun 15, 2005 page 7 of 17
HA16141P/FP, HA16142P/FP
Electrical Characteristics (cont.)
(Ta = 25C, VCC = 14 V)
Latch Item Threshold voltage for PFC stop Threshold Voltage for PWM stop Latch Reset Voltage PWM-VAMP Feedback VCC voltage Open loop gain High voltage Low voltage Source current Sink current Transconductance respect to VCC Delay to output Symbol Vlch-pfc Vlch-sys Vcc-res Vfb-pwm Av-pwm Veoh-pwm Veol-pwm Isrc-pwm Isnk-pwm Gm-pwm td-cs Min 2.4 3.8 6.1 14.2 - 5.1 - - - 19 - Typ 2.5 4.0 7.1 14.8 45 5.7 0.1 -77 77 27 210 Max 2.6 4.2 8.1 15.4 - 6.3 0.3 - - 35 300 Unit V V V V dB V V A A A/V ns PWM-EO = 2.5V * 1, 2 **
2
Test Conditions Input pin: TIM Input pin: TIM
VCC = 14V, PWM-EO: Open VCC = 16V, 2 PWM-EO: Open * * VCC = 11V 1 2 * VCC = 18V * VCC = 15V, 2 PWM-EO = 2.5V * PWM-EO = 5V, PWM-CS = 0 to 2V
1
PWM current sense PFC current limit PFC-VAMP
Threshold voltage Delay to output Feedback voltage Input bias current Open loop gain High voltage Low voltage Source current Sink current Transconductance
VLM td-LM Vfb-pfc Ifb-pfc Av-pfc Veoh-pfc Veol-pfc Isrc-pfc Isnk-pfc Gm-pfcv
-0.47 - 2.45 -0.30 - 5.1 - -62 62 120
-0.50 280 2.50 -0.07 65 5.7 0.1 -77 77 160
-0.53 500 2.55 +0.30 - 6.3 0.3 -93 93 200
V ns V A dB V V A A A/V
PFC-CS = 0 to -1V PFC-EO = 2.5V Measured pin: PFC-FB * PFC-FB = 2.3V, PFC-EO: Open PFC-FB = 2.7V, PFC-EO: Open PFC-FB = 1.0V, PFC-EO = 2.5V PFC-FB = 4.0V, PFC-EO = 2.5V PFC-FB = 2.5V, PFC-EO = 2.5V
1
Notes: 1. Design spec. 2. Apply to HA16141.
Rev.5.00 Jun 15, 2005 page 8 of 17
HA16141P/FP, HA16142P/FP
Electrical Characteristics (cont.)
(Ta = 25C, VCC = 14 V)
PFC-CAMP Item Input offset voltage Open loop gain High voltage Low voltage Source current Sink current Transconductance IAC/ Multiplier IAC PIN voltage Terminal offset current Output current (PFC-ON = 3.4V) Symbol Vio-ca Av-ca Veoh-ca Veol-ca Isrc-ca Isnk-ca Gm-pfcc Viac Imo-offset Imo1 Imo2 Output current (PFC-ON = 3.9V) Imo3 Imo4 PFC-CS resistance Threshold voltage for K = 0.05 Threshold voltage for K = 0.25 VK hysteresis voltage Rmo VK-H VK-L dVK Min - - 5.1 - - - 120 0.7 -56 - - - - - 3.71 3.51 0.15 Typ 7 65 5.7 0.1 -77 77 160 1.0 -75 -25 -75 -5 -15 2.7 3.83 3.63 0.20 Max - - 6.3 0.3 - - 200 1.3 -94 - - - - - 3.95 3.75 0.25 Unit mV dB V V A A A/V V A A A A A k V V V *
1
Test Conditions * *
1 1
CAO = 2.5V *
1 1
CAO = 2.5V * 1 *
IAC = 100A IAC = 0A, PFC-CS = 0V, Measured pin: PFC-CS PFC-EO = 2V, 1, 2 IAC = 100A * * PFC-EO = 4V, 1, 2 IAC = 100A * * PFC-EO = 2V, 1, 2 IAC = 100A * * PFC-EO = 4V, 1, 2 IAC = 100A * * *
1
Gain selector
Notes: 1. Design spec. 2. Imo1 to Imo4 are defined as, Imo = (PFC-CS Terminal Current) - (Imo-offset)
Imo = K {IAC x (VEO - 1V)}
IAC
IAC
VEO K
Imo
2.7k
- +
VREF
- +
-0.5V 55k
PFC-CAMP
PFC-CS
PFC-CS Terminal Current Imo-offset
+ -
PFC-CLIMIT
Rev.5.00 Jun 15, 2005 page 9 of 17
HA16141P/FP, HA16142P/FP
Internal Timing
1. UVLO
13V VCC 5V VREF 4.6V 0V VREF GOOD (internal signal) System Enable 0V 10V
2. Oscillator, Gate driver output
3.2V Reference triangle wave CT 200 kHz (internal signal) 1.6V PWM-RES (internal signal) PFC-DT (internal signal) PFC triangle wave Ramp 100 kHz (internal signal) PFC current amp. output CAO PWM current sense PWM-CS 3.4V
0.65V PWM voltage feedback (internal signal)
PWM-OUT (Trailing Edge control)
PFC-OUT (Leading Edge control)
Note: All numeric values in the figure are typical values.
Rev.5.00 Jun 15, 2005 page 10 of 17
HA16141P/FP, HA16142P/FP 3. PFC controller status
Precondition: VREF GOOD, Non latched. PFC-ON 1.5V 1.5V 1.2V 1.2V
2.75V PFC-FB 2.34V
2.60V 2.34V 1.70V
PG
PFC-OUT
PFC pulses stopped by PFC-ON, and PG signal high PFC pulses stopped due to high PFC-FB voltage (overshoot prevention) PFC pulses stopped by PFC-ON, and PG signal high
PFC pulses stopped by PFC-ON, and PG signal high
PG signal high due to low PFC-FB voltage
PG signal high due to low PFC-FB voltage
Normal operation
Normal operation
Normal operation
Normal operation
Notes: 1. All numeric values in the figure are typical values. 2. PFC-ON The HA16141P/FP can perform on/off control of the PFC function using the PFC-ON pin. If an AC voltage that has undergone primary rectification and has been divided with an external resistance is input, PFC stoppage is possible in the event of a low input voltage. On/off control by means of a logic signal is also possible. 3. PFC-FB The input to this pin is the voltage obtained by dividing the stepped-up PFC output voltage. The pin voltage is fed back to the PFC control system, and is also used for step-up voltage logic decisions. This is outlined in the figure below. Hysteresis 2.75V Feedback voltage 2.50V 2.34V Hysteresis 1.70V (Note 3 is continued on the next page) 2.60V PFC-OUT pulse stoppage (Reduction of step-up voltage overshoot)
PG (Power Good) signal is output
Rev.5.00 Jun 15, 2005 page 11 of 17
HA16141P/FP, HA16142P/FP 3. PFC controller status (cont.)
Notes: 3. PFC-FB (cont.) The actual input voltage to the PFC-FB pin is the step-up voltage divided with a resistance (see figure below). If R1 is set as 710 k and R2 as 4.7 k, the decision voltage at the step-up pin (+B) is as shown in the figure below. +B R1 710k PFC-FB R2 4.7k PFC-VAMP
- +
To Multiplier
2.5V PFC-EO
Precondition: VREF GOOD, PFC-ON, Non latched. 418V Step-up voltage +B 356V 395V 380V (Typical Output Voltage) 259V
2.75V PFC-FB 2.34V
2.60V 2.5V (PFC Feedback Voltage) 1.70V
PG
Power Good Period
PFC-OUT
Notes: 4. All numeric values in the figure are typical values.
Rev.5.00 Jun 15, 2005 page 12 of 17
HA16141P/FP, HA16142P/FP 4. PFC-ON pin
The following functions are effected by inputting an AC voltage that has undergone primary rectification and has been divided with an external resistance to the PFC-ON pin (see figure below). a) Turning PFC operation off when AC voltage is low b) Switching multiplier gain with AC 100 V system and 200 V system input Em Rec+ R1 720k PFC-ON 2.2F R2 20k
- +
3.83V 3.63V
- +
Switching Multiplier Gain
PFC-ON/OFF Control
1.5V 1.2V
PFC-ON(dc) = 2 Em / R2 / (R1 + R2) = 2 (2) Vac / R2 / (R1 + R2)
Precondition: VREF GOOD, Non latched.
AC voltage Vac
157Vac 62Vac 0Vac
149Vac 49Vac
3.83V PFC-ON 1.5V 0V ON
3.63V 1.2V
PFC Status (internal status)
PFC-ON Period OFF
Multiplier gain (internal status)
0.25 0.05
Note: All numeric values in the figure are typical values.
Rev.5.00 Jun 15, 2005 page 13 of 17
HA16141P/FP, HA16142P/FP 5. Integrator (OC detection operation)
PWM-RES (internal signal)
O.C (overcurrent detection input)
0.3V 5.2A
TIM pin current (integral output current)
0 -21A
3V
2.5V
TIM pin voltage (integral output voltage)
0.2V
t-tim1 LATCH STATUS (for PFC-STOP)
PFC Stop
PFC Enable
LATCH STATUS (for PWM-STOP)
PWM Enable
Note: Timer time calculation equation Timer time t-tim1 is the time until PG pin inversion (from low to high) after the O.C pin trigger. t-tim1 can be set using the following approximate equation. t-tim1 = -Ctim (Vlch - pfc - 0.2V) / Isrc - tim1 = -Ctim (2.5V - 0.2V) / (-21A) Typical calculation
Rev.5.00 Jun 15, 2005 page 14 of 17
HA16141P/FP, HA16142P/FP 6. Integrator (PWM-CS detection operation)
PWM-RES (internal signal)
PWM-CS (current sense input)
1V 5.2A
TIM pin current (integral output current)
0 -33A
4V
2.5V
TIM pin voltage (integral output voltage)
0.2V
t-tim2 LATCH STATUS (for PFC-STOP)
PFC Stop
PFC Enable PWM Stop
LATCH STATUS (for PWM-STOP)
t-tim2' PWM Enable
Note: Timer time calculation equation Timer time t-tim2 is the time until PG pin inversion (from low to high) after the PWM-CS pin trigger. t-tim2 can be set using the following approximate equation. t-tim2 = -Ctim (Vlch - pfc - 0.2V) / Isrc - tim2 = -Ctim (2.5V - 0.2V) / (-33A) Typical calculation The time at which both the PFC and PWM functions are stopped by this timer can be calculated using the following approximate equation. t-tim2' = 1.65 t - tim2 Typical calculation
Rev.5.00 Jun 15, 2005 page 15 of 17
HA16141P/FP, HA16142P/FP
Mark Pattern
1, 2: Lot indication Control code
Ejector pin
123 HA16141P (HA16142P)
Ejector pin
Type code
Notes: 1. Example of lot indication. For example, a product manufactured in May 2000 has the markings "0E" in positions 1 2 in the above figure.
Production Month May Year 2000 Indication
1 2 E
0
Month Code
Jan A
Feb B
Mar C
Apr D
May E
Jun F
Jul G
Aug H
Sep J
Oct K
Nov L
Dec M
2. Laser marking is used.
Rev.5.00 Jun 15, 2005 page 16 of 17
HA16141P/FP, HA16142P/FP
Package Dimensions
19.20 20.00 Max 16 9
As of January, 2003
Unit: mm
1 1.3
1.11 Max
8
7.40 Max
6.30
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 0.25
0.48 0.10
0.25 - 0.05 0 - 15
Package Code JEDEC JEITA Mass (reference value)
+ 0.13
DP-16 Conforms Conforms 1.07 g
JEITA Package Code P-SOP16-5.5x10.06-1.27
RENESAS Code PRSP0016DH-A
Previous Code FP-16DA
MASS[Typ.] 0.24g
*1
D F 9
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp b1
E
HE
c1
Index mark
Reference Symbol
*2
c
Dimension in Millimeters Min Nom 10.06 5.5 Max 10.5
Terminal cross section
1 Z e
*3
D E
8 bp x M L1
A2 A1 A b b c
p 1
0.00
0.10
0.20 2.20
0.34
0.42 0.40
0.50
0.17
1
0.22 0.20
0.27
A
c
HE
0 7.50 7.80 1.27
8 8.00
A1
y L
e x y
0.12 0.15 0.80 0.50
1
Detail F
Z L L 0.70 1.15
0.90
Rev.5.00 Jun 15, 2005 page 17 of 17
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
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(c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
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